In real-time signal processing systems, high speed analog-to-digital converters (ADC) are the primary limiting subsystem. The common method to achieve high speed conversion is to use the flash ADC. This type of ADC conprises a bank of comparators in parallel to compare the input signal with each reference transition level. For an n binary bit ADC, 2.sup.n -1 comparators are required. For large number of bits, the number of comparators can be excessive for integrated circuits.
Folding and analog encoding techniques have been suggested to reduce the number of comparators. Although these approaches have achieved some degree of improvement in reducing the comparator count, the folding or analog encoding circuits are usually very complex and the frequency response suffers.
The resonant tunneling diode (RTD) is an ultra-high speed device. The switching speed of this device can be less than a picosecond. By stacking a series of RTDs in an integrated structure, one can obtain a multiple peak folding voltage vs current characteristic
In a paper by Kuo etal, "A Novel A/D Converter Using Resonant Tunneling Diodes". published in the IEEE Journal of Solid-State Circuits, Vol. 26, No. 2. February 1991, pp146-149, and a copending U.S. patent application Ser. No. 07/391,221, an ADC using RTDs is described. In Kuo's method, a resistance is connected in series with a RTD to change its triangular V-I folding to an unsymmetrical sawtooth V-I characteristic. Then, two RTDs with saw-tooth characteristics are connected together differentially to produce a rectangular folding characteristic. With rectangular folding characteristics, the input voltage is converted either to binary "1" or "0" logic levels. Thus, the input voltage is converted into digital signals without using comparators.
The Kuo circuit, however, has a serious drawback in that the series resistance must exactly match the negative resistance of the RTD to obtain a rectangular folding characteristic. This resistance requirement has caused problems in producing and operating the ADC, because this resistance cannot be controlled accurately in fabrication. Without a rectangular folding charactersitic, the ADC may fail to yield quantized binary digital output. Then, a comparator is required and the major advantage is lost. Further, appropriate offset voltages must be chosen to produce a desired binary output.
Another common practice in ADC design is to incorporate a latch after the comparator. The latch is a regenerative circuit to speed up the transition from one logic level to another logic level. Thus, latching is desirable but is lacking in Kuo's ADC.